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目 录 索 引
Spartan-3E FPGA Family:Introduction and Ordering(Datasheet Module 1).................. 5
Introduction__简介:................................................................................................... 5
Features__特征:........................................................................................................ 5
Architectural Overview__体系结构概述....................................................................... 7
Configuration__配置.................................................................................................... 8
I/O Capabilities__IO能力............................................................................................. 8
Package Marking__封装标识....................................................................................... 9
Ordering Information__订单信息............................................................................... 10
Production Stepping__产品等级.................................................................................11
Spartan-3E FPGA Family:Functional Description(Datasheet Module 2)..................... 12
New Spartan-3 Generation Design Documentation Available__新的可用的斯巴达3世
代设计文档................................................................................................................. 12
Input/Output Blocks (IOBs) __输入/输出块(IOB).................................................. 14
IOB Overview__IOB 概述................................................................................... 14
Input Delay Functions__输入延迟功能............................................................... 15
Storage Element Functions__存储元件功能...................................................... 17
Double-Data-Rate Transmission__双重数据速率传输....................................... 18
SelectIO Signal Standards__选择IO 信号标准................................................. 20
On-Chip Differential Termination__片内差分终端.............................................. 23
Pull-Up and Pull-Down Resistors__上拉和下拉电阻.......................................... 23
Keeper Circuit__看守电路.................................................................................. 24
Slew Rate Control and Drive Strength__转换速率控制和驱动强度................... 24
IOBs Organized into Banks__以Bank形式组织的IOB..................................... 25
I/O Banking Rules__ IO Bank 规则.................................................................... 26
Package Footprint Compatibility__封装的管脚兼容........................................... 26
Dedicated Inputs__专用输入管脚....................................................................... 27
ESD Protection__ ESD 防护.............................................................................. 27
Supply Voltages for the IOBs__ IOB 的电源电压............................................... 27
I/O and Input-Only Pin Behavior During Power-On, Configuration,and User
Mode__配置,以及用户模式.............................................................................. 27
Behavior of Unused I/O Pins After Configuration__配置之后未使用IO管脚的行为
............................................................................................................................ 28
JTAG Boundary-Scan Capability__ JTAG边界扫描能力.................................. 29
Digital Clock Managers (DCMs)__数字时钟管理器DCM.......................................... 29
Differences from the Spartan-3 Architecture__ 体系结构与斯巴达3 的不同.... 29
Overview__概述.................................................................................................. 29
Delay-Locked Loop (DLL)__ 延迟锁定环路....................................................... 30
Digital Frequency Synthesizer (DFS)__数字频率合成....................................... 31
Phase Shifter (PS)__移相器............................................................................... 33
Clocking Infrastructure__同步定时的基础结构................................................... 33
Clock Inputs__时钟输入..................................................................................... 33
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