AT24C128-256

张衍波

Features
? Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
? Internally Organized 16,384 x 8 and 32,768 x 8
? 2-wire Serial Interface
? Schmitt Trigger, Filtered Inputs for Noise Suppression
? Bidirectional Data Transfer Protocol
? 1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility
? Write Protect Pin for Hardware and Software Data Protection
? 64-byte Page Write Mode (Partial Page Writes Allowed)
? Self-timed Write Cycle (5 ms Typical)
? High Reliability
– Endurance: 100,000 Write Cycles
– Data Retention: 40 Years
? Automotive Grade and Extended Temperature Devices Available
? 8-pin JEDEC PDIP, 8-pin JEDEC and EIAJ SOIC, 8-pin TSSOP, 14-pin TSSOP and 8-ball
dBGATM Packages
Description
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
bits each. The device’s cascadable feature allows up to 4 devices to share a common
2-wire bus. The device is optimized for use in many industrial and commercial applications
where low power and low voltage operation are essential. The devices are
available in space-saving 8-pin JEDEC PDIP, 8-pin JEDEC SOIC, 8-pin EIAJ SOIC, 8-
pin TSSOP, 14-pin TSSOP and 8-ball dBGA packages. In addition, the entire family is
available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.